Abstract
In many applications, such as multimedia and on-chip camera, there is a need for the production of low power, low weight and low cost integrated circuits. Several CMOS vision chips have been proposed in the literature. Some limitations of conventional 2D architectures are discussed and a new 3D generation of vision chips is presented and reviewed in this paper. As a result of this analysis, some conclusions on the advantages and limitations of 2D vision chips and the feasibility of the 3D approach are explored.
| Original language | English |
|---|---|
| Pages (from-to) | 248-256 |
| Number of pages | 9 |
| Journal | Proceedings of SPIE - The International Society for Optical Engineering |
| Volume | 3891 |
| Publication status | Published - 1999 |
| Externally published | Yes |
| Event | Proceedings of the 1999 Electronics and Structures for MEMS - Royal Pines Resort, Aust Duration: 27 Oct 1999 → 29 Oct 1999 |