TY - GEN
T1 - A 2PJ/Pixel/Direction MIMO Processing Based CMOS Image Sensor for Omnidirectional Local Binary Pattern Extraction and Edge Detection
AU - Zhong, Xiaopeng
AU - Yu, Qian
AU - Bermak, Amine
AU - Tsui, Chi Ying
AU - Law, May Kay
N1 - Publisher Copyright:
© 2018 IEEE.
PY - 2018/10/22
Y1 - 2018/10/22
N2 - This paper presents an energy-efficient multi-mode CMOS image sensor featuring omnidirectional local binary pattern extraction (LBP-E), edge detection (ED) and normal imaging. A mixed-signal 4-pixel simultaneous group computation (GC) scheme is developed to extract complete 8-direction LBP and edge. High-speed and energy-efficient column-parallel GC is achieved with the proposed group-switchable multi-input multi-output (MIMO) comparator. The reconfigurable mixed-signal processing circuits ensure multi-mode operations with minimum area overhead. Fabricated in 0.18μ m CMOS, the prototype sensor consumes 6.5μ W and 12.7μ W at 30fps for full 8-direction LBP-E and ED, achieving the state-of-the-art FoMs of 2.0 and 3.9 pJ/pixel/direction, respectively. Measurement results also demonstrate high-accuracy on-chip LBP-E, with a histogram similarity of up to 97.5% compared to the DSP one.
AB - This paper presents an energy-efficient multi-mode CMOS image sensor featuring omnidirectional local binary pattern extraction (LBP-E), edge detection (ED) and normal imaging. A mixed-signal 4-pixel simultaneous group computation (GC) scheme is developed to extract complete 8-direction LBP and edge. High-speed and energy-efficient column-parallel GC is achieved with the proposed group-switchable multi-input multi-output (MIMO) comparator. The reconfigurable mixed-signal processing circuits ensure multi-mode operations with minimum area overhead. Fabricated in 0.18μ m CMOS, the prototype sensor consumes 6.5μ W and 12.7μ W at 30fps for full 8-direction LBP-E and ED, achieving the state-of-the-art FoMs of 2.0 and 3.9 pJ/pixel/direction, respectively. Measurement results also demonstrate high-accuracy on-chip LBP-E, with a histogram similarity of up to 97.5% compared to the DSP one.
UR - http://www.scopus.com/inward/record.url?scp=85056906541&partnerID=8YFLogxK
U2 - 10.1109/VLSIC.2018.8502214
DO - 10.1109/VLSIC.2018.8502214
M3 - Conference contribution
AN - SCOPUS:85056906541
T3 - IEEE Symposium on VLSI Circuits, Digest of Technical Papers
SP - 247
EP - 248
BT - 2018 IEEE Symposium on VLSI Circuits, VLSI Circuits 2018
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 32nd IEEE Symposium on VLSI Circuits, VLSI Circuits 2018
Y2 - 18 June 2018 through 22 June 2018
ER -