A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor

Chen Shoushunf; Amine Bermakf; Wang Yanf; Dominique Martinez

doi:10.1109/CICC.2006.320903

A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor

Chen Shoushunf^*, Amine Bermakf, Wang Yanf, Dominique Martinez

^*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Citations (Scopus)

Abstract

In this paper, a CMOS image sensor with on-chip compression processor is proposed. An adaptive quantization scheme based on boundary adaptation procedure followed by an on-line quadrant tree decomposition processing is proposed enabling low power, robust and compact image compression processor. The image sensor chip has been implemented using 0.35μm CMOS technology and operates at 3.3 V. Simulation and experimental results show compression figures corresponding to 0.6-0.8 BPP, while maintaining reasonable PSNR levels and very low operating power consumption.

Original language	English
Title of host publication	Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006
Pages	329-332
Number of pages	4
DOIs	https://doi.org/10.1109/CICC.2006.320903
Publication status	Published - 2006
Externally published	Yes
Event	IEEE 2006 Custom Integrated Circuits Conference, CICC 2006 - San Jose, CA, United States Duration: 10 Sept 2006 → 13 Sept 2006

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
ISSN (Print)	0886-5930

Conference

Conference	IEEE 2006 Custom Integrated Circuits Conference, CICC 2006
Country/Territory	United States
City	San Jose, CA
Period	10/09/06 → 13/09/06

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10.1109/CICC.2006.320903

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Shoushunf, C., Bermakf, A., Yanf, W., & Martinez, D. (2006). A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor. In Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006 (pp. 329-332). Article 4114971 (Proceedings of the Custom Integrated Circuits Conference). https://doi.org/10.1109/CICC.2006.320903

@inproceedings{5d28f8fc282e418eaaeea2979bcb7b28,

title = "A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor",

abstract = "In this paper, a CMOS image sensor with on-chip compression processor is proposed. An adaptive quantization scheme based on boundary adaptation procedure followed by an on-line quadrant tree decomposition processing is proposed enabling low power, robust and compact image compression processor. The image sensor chip has been implemented using 0.35μm CMOS technology and operates at 3.3 V. Simulation and experimental results show compression figures corresponding to 0.6-0.8 BPP, while maintaining reasonable PSNR levels and very low operating power consumption.",

author = "Chen Shoushunf and Amine Bermakf and Wang Yanf and Dominique Martinez",

year = "2006",

doi = "10.1109/CICC.2006.320903",

language = "English",

isbn = "1424400767",

series = "Proceedings of the Custom Integrated Circuits Conference",

pages = "329--332",

booktitle = "Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006",

note = "IEEE 2006 Custom Integrated Circuits Conference, CICC 2006 ; Conference date: 10-09-2006 Through 13-09-2006",

}

Shoushunf, C, Bermakf, A, Yanf, W & Martinez, D 2006, A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor. in Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006., 4114971, Proceedings of the Custom Integrated Circuits Conference, pp. 329-332, IEEE 2006 Custom Integrated Circuits Conference, CICC 2006, San Jose, CA, United States, 10/09/06. https://doi.org/10.1109/CICC.2006.320903

A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor. / Shoushunf, Chen; Bermakf, Amine; Yanf, Wang et al.
Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006. 2006. p. 329-332 4114971 (Proceedings of the Custom Integrated Circuits Conference).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor

AU - Shoushunf, Chen

AU - Bermakf, Amine

AU - Yanf, Wang

AU - Martinez, Dominique

PY - 2006

Y1 - 2006

N2 - In this paper, a CMOS image sensor with on-chip compression processor is proposed. An adaptive quantization scheme based on boundary adaptation procedure followed by an on-line quadrant tree decomposition processing is proposed enabling low power, robust and compact image compression processor. The image sensor chip has been implemented using 0.35μm CMOS technology and operates at 3.3 V. Simulation and experimental results show compression figures corresponding to 0.6-0.8 BPP, while maintaining reasonable PSNR levels and very low operating power consumption.

AB - In this paper, a CMOS image sensor with on-chip compression processor is proposed. An adaptive quantization scheme based on boundary adaptation procedure followed by an on-line quadrant tree decomposition processing is proposed enabling low power, robust and compact image compression processor. The image sensor chip has been implemented using 0.35μm CMOS technology and operates at 3.3 V. Simulation and experimental results show compression figures corresponding to 0.6-0.8 BPP, while maintaining reasonable PSNR levels and very low operating power consumption.

UR - http://www.scopus.com/inward/record.url?scp=39049126986&partnerID=8YFLogxK

U2 - 10.1109/CICC.2006.320903

DO - 10.1109/CICC.2006.320903

M3 - Conference contribution

AN - SCOPUS:39049126986

SN - 1424400767

SN - 9781424400768

T3 - Proceedings of the Custom Integrated Circuits Conference

SP - 329

EP - 332

BT - Proceedings of the IEEE 2006 Custom Integrated Circuits Conference, CICC 2006

T2 - IEEE 2006 Custom Integrated Circuits Conference, CICC 2006

Y2 - 10 September 2006 through 13 September 2006

ER -

A CMOS image sensor with combined adaptive-quantization and QTD-based on-chip compression processor

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