A High-Logic-Density, Low-Power Control Character Detection and Identification Circuit for the JESD204B Data Link Layer

Qiushi Wang; Peng Yin; Nairiga Wu; Amine Bermak; Fang Tang

doi:10.1109/TCSII.2022.3226520

A High-Logic-Density, Low-Power Control Character Detection and Identification Circuit for the JESD204B Data Link Layer

Qiushi Wang, Peng Yin, Nairiga Wu, Amine Bermak, Fang Tang^*

^*Corresponding author for this work

CSE Information & Computing Technology

Research output: Contribution to journal › Article › peer-review

4 Citations (Scopus)

Abstract

In this brief a design methodology is proposed for the control character detection and identification (CCDI) in JESD204B data link layer. The longest common sequence (LCS) is extracted as the basis in the pre-detection step, and the remaining characteristic sequence is used in the second detection step. The verification results illustrate that the proposed optimization design can achieve high logic density and low power consumption. The reduction of the hardware resources and power consumption is about 37.5% and 17%-20% respectively as compared with the traditional scheme.

Original language	English
Pages (from-to)	1600-1604
Number of pages	5
Journal	IEEE Transactions on Circuits and Systems II: Express Briefs
Volume	70
Issue number	4
DOIs	https://doi.org/10.1109/TCSII.2022.3226520
Publication status	Published - 1 Apr 2023

Keywords

JESD204B
common sequence
detection and identification
high logic density
low power

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10.1109/TCSII.2022.3226520

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abstract = "In this brief a design methodology is proposed for the control character detection and identification (CCDI) in JESD204B data link layer. The longest common sequence (LCS) is extracted as the basis in the pre-detection step, and the remaining characteristic sequence is used in the second detection step. The verification results illustrate that the proposed optimization design can achieve high logic density and low power consumption. The reduction of the hardware resources and power consumption is about 37.5% and 17%-20% respectively as compared with the traditional scheme.",

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AU - Wang, Qiushi

AU - Yin, Peng

AU - Wu, Nairiga

AU - Bermak, Amine

AU - Tang, Fang

PY - 2023/4/1

Y1 - 2023/4/1

N2 - In this brief a design methodology is proposed for the control character detection and identification (CCDI) in JESD204B data link layer. The longest common sequence (LCS) is extracted as the basis in the pre-detection step, and the remaining characteristic sequence is used in the second detection step. The verification results illustrate that the proposed optimization design can achieve high logic density and low power consumption. The reduction of the hardware resources and power consumption is about 37.5% and 17%-20% respectively as compared with the traditional scheme.

AB - In this brief a design methodology is proposed for the control character detection and identification (CCDI) in JESD204B data link layer. The longest common sequence (LCS) is extracted as the basis in the pre-detection step, and the remaining characteristic sequence is used in the second detection step. The verification results illustrate that the proposed optimization design can achieve high logic density and low power consumption. The reduction of the hardware resources and power consumption is about 37.5% and 17%-20% respectively as compared with the traditional scheme.

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KW - detection and identification

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A High-Logic-Density, Low-Power Control Character Detection and Identification Circuit for the JESD204B Data Link Layer

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Keywords

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