@inproceedings{127a1bb20ddc435bb03e20745d549eca,
title = "A high-speed 32-bit signed/unsigned pipelined multiplier",
abstract = "In this paper, a novel unified implementation of signed/unsigned multiplication is proposed using a simple sign-control unit together with a line of multiplexers. The proposed approach is demonstrated through a 0.18μm CMOS implementation of a 32-bit signed/unsigned multiplier. Reported results show that the proposed unified signed/unsigned implementation is very compact with only 0.45% silicon area overhead. The critical path delay of the proposed multiplier is about 3.13ns.",
keywords = "Booth encoding, Fast adder, Signed/unsigned multiplier, Wallace tree",
author = "Qingzheng Li and Guixuan Liang and Amine Bermak",
year = "2010",
doi = "10.1109/DELTA.2010.10",
language = "English",
isbn = "9780769539782",
series = "Proceedings - 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010",
pages = "207--211",
booktitle = "Proceedings - 5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010",
note = "5th IEEE International Symposium on Electronic Design, Test and Applications, DELTA 2010 ; Conference date: 13-01-2010 Through 15-01-2010",
}