Abstract
This paper describes a 3D VLSI Chip for binary neural network classification applications. The 3D circuit includes three layers of MCM integrating 4 chips each making it a total of 12 chips integrated in a volume of (2 × 2 × 0.7)cm3. The architecture is scalable, and real-time binary neural network classifier systems could be built with one, two or all twelve chip solutions. Each basic chip includes an on-chip control unit for programming options of the neural network topology and precision. The system is modular and presents easy expansibility without requiring extra devices. Experimental test results showed that a full recall operation is obtained in less than 1.2μs for any topology with 4-bit or 8-bit precision while it is obtained in less than 2.2μs for any 16-bit precision. As a consequence the 3D chip is a very powerful reconfigurable and a multiprecision neural chip exhibiting a significant speed of 1.25 GCPS.
| Original language | English |
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| Pages (from-to) | V685-V688 |
| Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
| Volume | 5 |
| Publication status | Published - 2003 |
| Externally published | Yes |
| Event | Proceedings of the 2003 IEEE International Symposium on Circuits and Systems - Bangkok, Thailand Duration: 25 May 2003 → 28 May 2003 |