A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology

Chen Xu; Chao Shen; Amine Bermak; Mansun Chan

doi:10.1109/EDSSC.2003.1283528

A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology

Chen Xu, Chao Shen, Amine Bermak, Mansun Chan

Hong Kong University of Science and Technology

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

12 Citations (Scopus)

Abstract

In this paper, a digital pixel architecture with pixel-level ADC based on Pulse Width Modulation (PWM) scheme and an 8-bit DRAM is proposed to operate at an extremely low voltage environment, i.e., 1.2V. This digital pixel architecture is designed to eliminate the restriction of low supply voltage imposed by device scaling trend. The pixel is implemented in a commercially available 0.18μm, single poly and 6 metal CMOS process. Simulation results show that the circuit is functional at a V_DD of 1.2V with a higher dynamic range and lower power consumption as compared to conventional CMOS APS architecture.

Original language	English
Title of host publication	2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	265-268
Number of pages	4
ISBN (Electronic)	0780377494, 9780780377493
DOIs	https://doi.org/10.1109/EDSSC.2003.1283528
Publication status	Published - 2003
Externally published	Yes
Event	IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 - Tsimshatsui, Kowloon, Hong Kong Duration: 16 Dec 2003 → 18 Dec 2003

Publication series

Name	2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003

Conference

Conference	IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003
Country/Territory	Hong Kong
City	Tsimshatsui, Kowloon
Period	16/12/03 → 18/12/03

Access to Document

10.1109/EDSSC.2003.1283528

Cite this

Xu, C., Shen, C., Bermak, A., & Chan, M. (2003). A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology. In 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 (pp. 265-268). Article 1283528 (2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/EDSSC.2003.1283528

Xu, Chen ; Shen, Chao ; Bermak, Amine et al. / A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology. 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003. Institute of Electrical and Electronics Engineers Inc., 2003. pp. 265-268 (2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003).

@inproceedings{3f4331bb698846fca0c3301c2ee37339,

title = "A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology",

abstract = "In this paper, a digital pixel architecture with pixel-level ADC based on Pulse Width Modulation (PWM) scheme and an 8-bit DRAM is proposed to operate at an extremely low voltage environment, i.e., 1.2V. This digital pixel architecture is designed to eliminate the restriction of low supply voltage imposed by device scaling trend. The pixel is implemented in a commercially available 0.18μm, single poly and 6 metal CMOS process. Simulation results show that the circuit is functional at a VDD of 1.2V with a higher dynamic range and lower power consumption as compared to conventional CMOS APS architecture.",

author = "Chen Xu and Chao Shen and Amine Bermak and Mansun Chan",

note = "Publisher Copyright: {\textcopyright}2003 IEEE.; IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003 ; Conference date: 16-12-2003 Through 18-12-2003",

year = "2003",

doi = "10.1109/EDSSC.2003.1283528",

language = "English",

series = "2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

pages = "265--268",

booktitle = "2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003",

address = "United States",

}

Xu, C, Shen, C, Bermak, A & Chan, M 2003, A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology. in 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003., 1283528, 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003, Institute of Electrical and Electronics Engineers Inc., pp. 265-268, IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003, Tsimshatsui, Kowloon, Hong Kong, 16/12/03. https://doi.org/10.1109/EDSSC.2003.1283528

A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology. / Xu, Chen; Shen, Chao; Bermak, Amine et al.
2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003. Institute of Electrical and Electronics Engineers Inc., 2003. p. 265-268 1283528 (2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology

AU - Xu, Chen

AU - Shen, Chao

AU - Bermak, Amine

AU - Chan, Mansun

PY - 2003

Y1 - 2003

N2 - In this paper, a digital pixel architecture with pixel-level ADC based on Pulse Width Modulation (PWM) scheme and an 8-bit DRAM is proposed to operate at an extremely low voltage environment, i.e., 1.2V. This digital pixel architecture is designed to eliminate the restriction of low supply voltage imposed by device scaling trend. The pixel is implemented in a commercially available 0.18μm, single poly and 6 metal CMOS process. Simulation results show that the circuit is functional at a VDD of 1.2V with a higher dynamic range and lower power consumption as compared to conventional CMOS APS architecture.

AB - In this paper, a digital pixel architecture with pixel-level ADC based on Pulse Width Modulation (PWM) scheme and an 8-bit DRAM is proposed to operate at an extremely low voltage environment, i.e., 1.2V. This digital pixel architecture is designed to eliminate the restriction of low supply voltage imposed by device scaling trend. The pixel is implemented in a commercially available 0.18μm, single poly and 6 metal CMOS process. Simulation results show that the circuit is functional at a VDD of 1.2V with a higher dynamic range and lower power consumption as compared to conventional CMOS APS architecture.

UR - http://www.scopus.com/inward/record.url?scp=35648967588&partnerID=8YFLogxK

U2 - 10.1109/EDSSC.2003.1283528

DO - 10.1109/EDSSC.2003.1283528

M3 - Conference contribution

AN - SCOPUS:35648967588

T3 - 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003

SP - 265

EP - 268

BT - 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003

Y2 - 16 December 2003 through 18 December 2003

ER -

Xu C, Shen C, Bermak A, Chan M. A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology. In 2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003. Institute of Electrical and Electronics Engineers Inc. 2003. p. 265-268. 1283528. (2003 IEEE Conference on Electron Devices and Solid-State Circuits, EDSSC 2003). doi: 10.1109/EDSSC.2003.1283528

A new digital-pixel architecture for CMOS image sensor with pixel-level ADC and pulse width modulation using a 0.18 μm CMOS technology

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