TY - GEN
T1 - A Novel Mixed-Signal Flash-based Finite Impulse Response (FFIR) Filter for IoT Applications
AU - Lee, Cheng Yen
AU - Khatri, Sunil P.
AU - Ghrayeb, Ali
N1 - Publisher Copyright:
© 2025 Institute of Electrical and Electronics Engineers Inc.. All rights reserved.
PY - 2025/3/4
Y1 - 2025/3/4
N2 - In this paper, we present a novel mixed-signal flash-based Finite Impulse Response (FFIR) filter architecture for IoT applications. The FFIR filter is scalable in that it can implement any filter with up to a provisioned maximum number of taps. Our FFIR filter utilizes flash transistors, a type of non-volatile memory (NVM) device, to perform analog computations in the current domain, achieving low power, energy, and area requirements. This design is well-suited for the Internet of Things (IoT) applications and other scenarios where resources are highly constrained. Our FFIR filter consists of several Flash-based Coefficient Multipliers (FCMs). The FIR coefficients of each FCM are stored in its constituent flash transistors, with the threshold voltage (Vt) of the flash transistors serving as a proxy for the filter coefficients. Furthermore, the impact of process or voltage variations is mitigated by precisely tuning the Vt of the flash transistors. The tuning of the Vt of the flash transistors can be performed either in the factory by the manufacturer (to negate process variations), or by the user in the field (to negate voltage variations or aging effects). We evaluate the tolerance of FFIR filters to manufacturing variations through Monte Carlo analysis, demonstrating robustness to process and VDD variations. Our FFIR design achieves a significant improvement over previous approaches. Compared to Digital FIR (DFIR) filters operating at the fastest frequency, we reduce the average of power, energy, and area by 4.05×, 1.95×, and 6.06×, while achieving an average peak signal-to-noise ratio (PSNR) of 38.04 dB and an average effective number of bits (ENOB) of 8.87 bits. In addition, we compare our FFIR filter with state-of-the-art Analog FIR (AFIR) filters as well. Our designs demonstrate significantly improved performance of at least 1.3×, 5.3×, and 18.5× in terms of energy per tap, area, and latency, respectively, when compared with the best among 4 recently published AFIR works.
AB - In this paper, we present a novel mixed-signal flash-based Finite Impulse Response (FFIR) filter architecture for IoT applications. The FFIR filter is scalable in that it can implement any filter with up to a provisioned maximum number of taps. Our FFIR filter utilizes flash transistors, a type of non-volatile memory (NVM) device, to perform analog computations in the current domain, achieving low power, energy, and area requirements. This design is well-suited for the Internet of Things (IoT) applications and other scenarios where resources are highly constrained. Our FFIR filter consists of several Flash-based Coefficient Multipliers (FCMs). The FIR coefficients of each FCM are stored in its constituent flash transistors, with the threshold voltage (Vt) of the flash transistors serving as a proxy for the filter coefficients. Furthermore, the impact of process or voltage variations is mitigated by precisely tuning the Vt of the flash transistors. The tuning of the Vt of the flash transistors can be performed either in the factory by the manufacturer (to negate process variations), or by the user in the field (to negate voltage variations or aging effects). We evaluate the tolerance of FFIR filters to manufacturing variations through Monte Carlo analysis, demonstrating robustness to process and VDD variations. Our FFIR design achieves a significant improvement over previous approaches. Compared to Digital FIR (DFIR) filters operating at the fastest frequency, we reduce the average of power, energy, and area by 4.05×, 1.95×, and 6.06×, while achieving an average peak signal-to-noise ratio (PSNR) of 38.04 dB and an average effective number of bits (ENOB) of 8.87 bits. In addition, we compare our FFIR filter with state-of-the-art Analog FIR (AFIR) filters as well. Our designs demonstrate significantly improved performance of at least 1.3×, 5.3×, and 18.5× in terms of energy per tap, area, and latency, respectively, when compared with the best among 4 recently published AFIR works.
KW - analog computation
KW - flash transistors
KW - flash-based FIR filter
KW - internet of things
KW - processing in-memory
UR - http://www.scopus.com/inward/record.url?scp=105000367998&partnerID=8YFLogxK
U2 - 10.1145/3658617.3697575
DO - 10.1145/3658617.3697575
M3 - Conference contribution
AN - SCOPUS:105000367998
T3 - Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
SP - 1216
EP - 1222
BT - ASP-DAC 2025 - 30th Asia and South Pacific Design Automation Conference, Proceedings
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 30th Asia and South Pacific Design Automation Conference, ASP-DAC 2025
Y2 - 20 January 2025 through 23 January 2025
ER -