Area- and throughput-optimized VLSI architecture of sphere decoding

Markus Wenk; Lukas Bruderer; Andreas Burg; Christoph Studer

doi:10.1109/VLSISOC.2010.5642593

Area- and throughput-optimized VLSI architecture of sphere decoding

Markus Wenk^*, Lukas Bruderer, Andreas Burg, Christoph Studer

^*Corresponding author for this work

Swiss Federal Institute of Technology Zurich

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

15 Citations (Scopus)

Abstract

Sphere decoding (SD) is a promising means for implementing high-performance data detection in multiple-input multiple-output (MIMO) wireless communication systems. In this paper, we focus on the register transfer level implementation of SD with minimum area-delay product for application in wideband MIMO communication systems, such as IEEE 802.11n, where multiple SD cores need to be instantiated. The basic architectural considerations and the proposed optimizations are explained based on hard-output SD, but are also applicable to soft-output SD. Corresponding VLSI implementation results (for both hard-output and soft-output SD) show an improvement in the area-delay product by almost 50% compared to that of other SD implementations reported in the literature.

Original language	English
Title of host publication	Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010
Pages	189-194
Number of pages	6
DOIs	https://doi.org/10.1109/VLSISOC.2010.5642593
Publication status	Published - 2010
Externally published	Yes
Event	2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010 - Madrid, Spain Duration: 27 Sept 2010 → 29 Sept 2010

Publication series

Name	Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010

Conference

Conference	2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010
Country/Territory	Spain
City	Madrid
Period	27/09/10 → 29/09/10

Access to Document

10.1109/VLSISOC.2010.5642593

Cite this

Wenk, M., Bruderer, L., Burg, A., & Studer, C. (2010). Area- and throughput-optimized VLSI architecture of sphere decoding. In Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010 (pp. 189-194). Article 5642593 (Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010). https://doi.org/10.1109/VLSISOC.2010.5642593

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title = "Area- and throughput-optimized VLSI architecture of sphere decoding",

abstract = "Sphere decoding (SD) is a promising means for implementing high-performance data detection in multiple-input multiple-output (MIMO) wireless communication systems. In this paper, we focus on the register transfer level implementation of SD with minimum area-delay product for application in wideband MIMO communication systems, such as IEEE 802.11n, where multiple SD cores need to be instantiated. The basic architectural considerations and the proposed optimizations are explained based on hard-output SD, but are also applicable to soft-output SD. Corresponding VLSI implementation results (for both hard-output and soft-output SD) show an improvement in the area-delay product by almost 50% compared to that of other SD implementations reported in the literature.",

author = "Markus Wenk and Lukas Bruderer and Andreas Burg and Christoph Studer",

year = "2010",

doi = "10.1109/VLSISOC.2010.5642593",

language = "English",

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series = "Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010",

pages = "189--194",

booktitle = "Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010",

note = "2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010 ; Conference date: 27-09-2010 Through 29-09-2010",

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Wenk, M, Bruderer, L, Burg, A & Studer, C 2010, Area- and throughput-optimized VLSI architecture of sphere decoding. in Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010., 5642593, Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010, pp. 189-194, 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010, Madrid, Spain, 27/09/10. https://doi.org/10.1109/VLSISOC.2010.5642593

Area- and throughput-optimized VLSI architecture of sphere decoding. / Wenk, Markus; Bruderer, Lukas; Burg, Andreas et al.
Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010. 2010. p. 189-194 5642593 (Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

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AB - Sphere decoding (SD) is a promising means for implementing high-performance data detection in multiple-input multiple-output (MIMO) wireless communication systems. In this paper, we focus on the register transfer level implementation of SD with minimum area-delay product for application in wideband MIMO communication systems, such as IEEE 802.11n, where multiple SD cores need to be instantiated. The basic architectural considerations and the proposed optimizations are explained based on hard-output SD, but are also applicable to soft-output SD. Corresponding VLSI implementation results (for both hard-output and soft-output SD) show an improvement in the area-delay product by almost 50% compared to that of other SD implementations reported in the literature.

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Wenk M, Bruderer L, Burg A, Studer C. Area- and throughput-optimized VLSI architecture of sphere decoding. In Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010. 2010. p. 189-194. 5642593. (Proceedings of the 2010 18th IEEE/IFIP International Conference on VLSI and System-on-Chip, VLSI-SoC 2010). doi: 10.1109/VLSISOC.2010.5642593

Area- and throughput-optimized VLSI architecture of sphere decoding

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