Convolutional neural network acceleration with hardware/software co-design

Andrew Tzer Yeu Chen; Morteza Biglari-Abhari; Kevin I.Kai Wang; Abdesselam Bouzerdoum; Fok Hing Chi Tivive

doi:10.1007/s10489-017-1007-z

Convolutional neural network acceleration with hardware/software co-design

Andrew Tzer Yeu Chen^*, Morteza Biglari-Abhari, Kevin I.Kai Wang, Abdesselam Bouzerdoum, Fok Hing Chi Tivive

^*Corresponding author for this work

HBKU College of Science and Engineering

Research output: Contribution to journal › Article › peer-review

13 Citations (Scopus)

Abstract

Convolutional Neural Networks (CNNs) have a broad range of applications, such as image processing and natural language processing. Inspired by the mammalian visual cortex, CNNs have been shown to achieve impressive results on a number of computer vision challenges, but often with large amounts of processing power and no timing restrictions. This paper presents a design methodology for accelerating CNNs using Hardware/Software Co-design techniques, in order to balance performance and flexibility, particularly for resource-constrained systems. The methodology is applied to a gender recognition case study, using an ARM processor and FPGA fabric to create an embedded system that can process facial images in real-time.

Original language	English
Pages (from-to)	1288-1301
Number of pages	14
Journal	Applied Intelligence
Volume	48
Issue number	5
DOIs	https://doi.org/10.1007/s10489-017-1007-z
Publication status	Published - 1 May 2018

Keywords

Co-design
Computer vision
Embedded system
FPGA
Gender recognition
Hardware acceleration
Neural network
Real-time

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10.1007/s10489-017-1007-z

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@article{0e58131a2fdd429993ea4cdefee2fd01,

title = "Convolutional neural network acceleration with hardware/software co-design",

abstract = "Convolutional Neural Networks (CNNs) have a broad range of applications, such as image processing and natural language processing. Inspired by the mammalian visual cortex, CNNs have been shown to achieve impressive results on a number of computer vision challenges, but often with large amounts of processing power and no timing restrictions. This paper presents a design methodology for accelerating CNNs using Hardware/Software Co-design techniques, in order to balance performance and flexibility, particularly for resource-constrained systems. The methodology is applied to a gender recognition case study, using an ARM processor and FPGA fabric to create an embedded system that can process facial images in real-time.",

keywords = "Co-design, Computer vision, Embedded system, FPGA, Gender recognition, Hardware acceleration, Neural network, Real-time",

author = "Chen, {Andrew Tzer Yeu} and Morteza Biglari-Abhari and Wang, {Kevin I.Kai} and Abdesselam Bouzerdoum and Tivive, {Fok Hing Chi}",

note = "Publisher Copyright: {\textcopyright} 2017, Springer Science+Business Media, LLC.",

year = "2018",

month = may,

day = "1",

doi = "10.1007/s10489-017-1007-z",

language = "English",

volume = "48",

pages = "1288--1301",

journal = "Applied Intelligence",

issn = "0924-669X",

publisher = "Springer Netherlands",

number = "5",

}

TY - JOUR

T1 - Convolutional neural network acceleration with hardware/software co-design

AU - Chen, Andrew Tzer Yeu

AU - Biglari-Abhari, Morteza

AU - Wang, Kevin I.Kai

AU - Bouzerdoum, Abdesselam

AU - Tivive, Fok Hing Chi

PY - 2018/5/1

Y1 - 2018/5/1

N2 - Convolutional Neural Networks (CNNs) have a broad range of applications, such as image processing and natural language processing. Inspired by the mammalian visual cortex, CNNs have been shown to achieve impressive results on a number of computer vision challenges, but often with large amounts of processing power and no timing restrictions. This paper presents a design methodology for accelerating CNNs using Hardware/Software Co-design techniques, in order to balance performance and flexibility, particularly for resource-constrained systems. The methodology is applied to a gender recognition case study, using an ARM processor and FPGA fabric to create an embedded system that can process facial images in real-time.

AB - Convolutional Neural Networks (CNNs) have a broad range of applications, such as image processing and natural language processing. Inspired by the mammalian visual cortex, CNNs have been shown to achieve impressive results on a number of computer vision challenges, but often with large amounts of processing power and no timing restrictions. This paper presents a design methodology for accelerating CNNs using Hardware/Software Co-design techniques, in order to balance performance and flexibility, particularly for resource-constrained systems. The methodology is applied to a gender recognition case study, using an ARM processor and FPGA fabric to create an embedded system that can process facial images in real-time.

KW - Co-design

KW - Computer vision

KW - Embedded system

KW - FPGA

KW - Gender recognition

KW - Hardware acceleration

KW - Neural network

KW - Real-time

UR - http://www.scopus.com/inward/record.url?scp=85026772982&partnerID=8YFLogxK

U2 - 10.1007/s10489-017-1007-z

DO - 10.1007/s10489-017-1007-z

M3 - Article

AN - SCOPUS:85026772982

SN - 0924-669X

VL - 48

SP - 1288

EP - 1301

JO - Applied Intelligence

JF - Applied Intelligence

IS - 5

ER -

Convolutional neural network acceleration with hardware/software co-design

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Keywords

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