Embedding large multidimensional DSP computations in reconfigurable logic

Ayman Elnaggar; Hussein M. Alnuweiri; Mabo R. Ito

Embedding large multidimensional DSP computations in reconfigurable logic

Ayman Elnaggar^*, Hussein M. Alnuweiri, Mabo R. Ito

^*Corresponding author for this work

University of British Columbia

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

Abstract

This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).

Original language	English
Title of host publication	Proceedings of SPIE - The International Society for Optical Engineering
Editors	John Schewel, Peter M. Athanas, V.Michael Jr. Bove, John Watson
Pages	300-307
Number of pages	8
Volume	2914
Publication status	Published - 1996
Externally published	Yes
Event	High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic - Boston, MA, USA Duration: 20 Nov 1996 → 21 Nov 1996

Conference

Conference	High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic
City	Boston, MA, USA
Period	20/11/96 → 21/11/96

Cite this

@inproceedings{38bd521aeb7047c596b371f243884320,

title = "Embedding large multidimensional DSP computations in reconfigurable logic",

abstract = "This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).",

author = "Ayman Elnaggar and Alnuweiri, {Hussein M.} and Ito, {Mabo R.}",

year = "1996",

language = "English",

isbn = "0819423165",

volume = "2914",

pages = "300--307",

editor = "John Schewel and Athanas, {Peter M.} and Bove, {V.Michael Jr.} and John Watson",

booktitle = "Proceedings of SPIE - The International Society for Optical Engineering",

note = "High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic ; Conference date: 20-11-1996 Through 21-11-1996",

}

Elnaggar, A, Alnuweiri, HM & Ito, MR 1996, Embedding large multidimensional DSP computations in reconfigurable logic. in J Schewel, PM Athanas, VMJ Bove & J Watson (eds), Proceedings of SPIE - The International Society for Optical Engineering. vol. 2914, pp. 300-307, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, Boston, MA, USA, 20/11/96.

Embedding large multidimensional DSP computations in reconfigurable logic. / Elnaggar, Ayman; Alnuweiri, Hussein M.; Ito, Mabo R.
Proceedings of SPIE - The International Society for Optical Engineering. ed. / John Schewel; Peter M. Athanas; V.Michael Jr. Bove; John Watson. Vol. 2914 1996. p. 300-307.

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Embedding large multidimensional DSP computations in reconfigurable logic

AU - Elnaggar, Ayman

AU - Alnuweiri, Hussein M.

AU - Ito, Mabo R.

PY - 1996

Y1 - 1996

N2 - This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).

AB - This paper presents an efficient methodology for decomposing and modularizing large computations so that they can be easily mapped onto FPGAs and other programmable logic structures. The paper focuses on the multidimensional discrete cosine transform (DCT). The main advantage of the proposed decomposition strategy is that it enables constructing large m-dimensional DCTs from a single stage of smaller size m-dimensional DCTs. We demonstrate the power of our technique by mapping 2-d DCT computations of various sizes on an FPGA-based transformable computer and report their performance (both in terms of speed and gate utilization).

UR - http://www.scopus.com/inward/record.url?scp=0030370239&partnerID=8YFLogxK

M3 - Conference contribution

AN - SCOPUS:0030370239

SN - 0819423165

SN - 9780819423160

VL - 2914

SP - 300

EP - 307

BT - Proceedings of SPIE - The International Society for Optical Engineering

A2 - Schewel, John

A2 - Athanas, Peter M.

A2 - Bove, V.Michael Jr.

A2 - Watson, John

T2 - High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic

Y2 - 20 November 1996 through 21 November 1996

ER -

Embedding large multidimensional DSP computations in reconfigurable logic

Abstract

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