TY - GEN
T1 - FPGA implementation of image compression using DPCM and FBAR
AU - Wang, Yan
AU - Chen, Shoushun
AU - Bermak, Amine
PY - 2007
Y1 - 2007
N2 - This paper presents a hybrid image compression algorithm based on a novel adaptive quantization algorithm referred to as Fast Boundary Adaptation Rule (FBAR) combined with the Differential Pulse Code Modulation (DPCM) technique. The proposed image compression technique results in enhanced image quality as compared to FBAR-based compression. Our proposed system is still much simpler compared to other transform coding for image compression, such as JPEG that are widely adopted as the international standard. This made our system a viable candidate for developing on chip image sensor with data compression processor. The proposed compression algorithm was validated through FPGA implementation and was interfaced with a CMOS image sensor for real life applications. An 8:1 compression ratio with fairly good image quality were achieved with an average of 30dB PSNR as compared to 25dB for FBAR.
AB - This paper presents a hybrid image compression algorithm based on a novel adaptive quantization algorithm referred to as Fast Boundary Adaptation Rule (FBAR) combined with the Differential Pulse Code Modulation (DPCM) technique. The proposed image compression technique results in enhanced image quality as compared to FBAR-based compression. Our proposed system is still much simpler compared to other transform coding for image compression, such as JPEG that are widely adopted as the international standard. This made our system a viable candidate for developing on chip image sensor with data compression processor. The proposed compression algorithm was validated through FPGA implementation and was interfaced with a CMOS image sensor for real life applications. An 8:1 compression ratio with fairly good image quality were achieved with an average of 30dB PSNR as compared to 25dB for FBAR.
UR - http://www.scopus.com/inward/record.url?scp=51549098177&partnerID=8YFLogxK
U2 - 10.1109/ISICIR.2007.4441865
DO - 10.1109/ISICIR.2007.4441865
M3 - Conference contribution
AN - SCOPUS:51549098177
SN - 1424407974
SN - 9781424407972
T3 - 2007 International Symposium on Integrated Circuits, ISIC
SP - 329
EP - 332
BT - 2007 International Symposium on Integrated Circuits, ISIC
T2 - 2007 International Symposium on Integrated Circuits, ISIC
Y2 - 26 September 2007 through 28 September 2007
ER -