TY - JOUR
T1 - FREYA
T2 - A 0.023-mm2 /Channel, 20.8-$\mu$ W/Channel, Event-Driven 8-Channel SoC for Spiking End-to-End Sensing of Time-Sparse Biosignals
AU - Van Assche, Jonah
AU - Frenkel, Charlotte
AU - Safa, Ali
AU - Gielen, Georges
N1 - Publisher Copyright:
© 2004-2012 IEEE.
PY - 2024/11/28
Y1 - 2024/11/28
N2 - Biomedical systems-on-chip (SoCs) for real-timemonitoring of vital signs need to read out multiple recordingchannels in parallel and process them locally with low latency,at a low per-channel area and power consumption. To achievethis, event-driven SoCs that exploit the time-sparse nature ofbiosignals such as the electrocardiogram (ECG) have beenproposed; they only process the signal when it shows activity.Such SoCs convert time-sparse biosignals into spike trains,on which spiking neural networks (SNNs) can perform event-driven signal classification. State-of-the-art event-driven SoCs,however, still suffer from poor area and power efficiency anduse inflexible, hard-coded spike-encoding schemes. To improveon these challenges, this paper presents FREYA, an 8-channelevent-driven SoC for end-to-end sensing of time-sparse biosignals.The proposed SoC consists of the following key contributions:1) an 8-channel time-division-multiplexed level-crossing sampling(LCS) analog-to-spike converter (ASC) that encodes analog inputsignals into input spikes for an on-chip SNN; 2) an ASC spike-encoding algorithm that is fully programmable in resolution (4 to8 bits) and conversion algorithm (offset and decay parameters);3) an on-chip integrated, flexible SNN processor based on aprogrammable crossbar architecture, that allows for efficientevent-driven processing, and that can be reconfigured towardsmultiple sensing applications; 4) a custom offline end-to-endtraining framework for the fast retraining of the spike-encodingalgorithm and SNN architecture towards new applications orpatient-dependent signal variations. A prototype IC has beenfabricated in a 40nm CMOS technology. It has a per-channelactive area of 0.023 mm2(0.184 mm2in total), a 7ximprovementover the state of the art. For the use case of ECG-based QRS-labeling, a detection accuracy of 98.67% is achieved, while the system consumes 20.8 mu W per channel and achieves a latency ofonly 80 ms, thus paving the way for multi-channel, high-fidelity,event-driven SoCs in biomedical applications.
AB - Biomedical systems-on-chip (SoCs) for real-timemonitoring of vital signs need to read out multiple recordingchannels in parallel and process them locally with low latency,at a low per-channel area and power consumption. To achievethis, event-driven SoCs that exploit the time-sparse nature ofbiosignals such as the electrocardiogram (ECG) have beenproposed; they only process the signal when it shows activity.Such SoCs convert time-sparse biosignals into spike trains,on which spiking neural networks (SNNs) can perform event-driven signal classification. State-of-the-art event-driven SoCs,however, still suffer from poor area and power efficiency anduse inflexible, hard-coded spike-encoding schemes. To improveon these challenges, this paper presents FREYA, an 8-channelevent-driven SoC for end-to-end sensing of time-sparse biosignals.The proposed SoC consists of the following key contributions:1) an 8-channel time-division-multiplexed level-crossing sampling(LCS) analog-to-spike converter (ASC) that encodes analog inputsignals into input spikes for an on-chip SNN; 2) an ASC spike-encoding algorithm that is fully programmable in resolution (4 to8 bits) and conversion algorithm (offset and decay parameters);3) an on-chip integrated, flexible SNN processor based on aprogrammable crossbar architecture, that allows for efficientevent-driven processing, and that can be reconfigured towardsmultiple sensing applications; 4) a custom offline end-to-endtraining framework for the fast retraining of the spike-encodingalgorithm and SNN architecture towards new applications orpatient-dependent signal variations. A prototype IC has beenfabricated in a 40nm CMOS technology. It has a per-channelactive area of 0.023 mm2(0.184 mm2in total), a 7ximprovementover the state of the art. For the use case of ECG-based QRS-labeling, a detection accuracy of 98.67% is achieved, while the system consumes 20.8 mu W per channel and achieves a latency ofonly 80 ms, thus paving the way for multi-channel, high-fidelity,event-driven SoCs in biomedical applications.
KW - Accuracy
KW - Biomedical SoC
KW - Clocks
KW - Electrocardiography
KW - Encoding
KW - Event-driven sensing
KW - Level-crossing sampling
KW - Logic
KW - Power demand
KW - Sensors
KW - Signal resolution
KW - Spiking neural networks
KW - System-on-chip
KW - Training
UR - http://www.scopus.com/inward/record.url?scp=85210994154&partnerID=8YFLogxK
UR - https://ieeexplore.ieee.org/document/10771590/
U2 - 10.1109/TCSI.2024.3504264
DO - 10.1109/TCSI.2024.3504264
M3 - Article
AN - SCOPUS:85210994154
SN - 1549-8328
VL - PP
SP - 0
EP - 1
JO - IEEE Transactions on Circuits and Systems I: Regular Papers
JF - IEEE Transactions on Circuits and Systems I: Regular Papers
IS - 99
M1 - 10771590
ER -