Highly parallel signal processing on the virtual computer

H. A. Chow*, A. Elnaggar, Hussein M. Alnuweiri

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

This paper investigates the concept of transformable computing as a means for achieving cost- effective high-performance computing. In this preliminary work we will provide performance figures for some representative DSP problems, specifically linear convolution and Fourier transforms. Our implementations are based on the highly parallel approach. We present an experimental setup in which an EVC1-s board is interfaced with a 40Mhz Sparc 10 SunStation. We show that using FPGA-based board provides significant speedups for the aforementioned problems over using the Sparc 10 processor alone. More importantly, it is shown that speedup will in general improve as the number of scheduled tasks increases.

Original languageEnglish
Title of host publicationProceedings of SPIE - The International Society for Optical Engineering
Pages42-53
Number of pages12
Publication statusPublished - 1995
Externally publishedYes
EventField Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing - Philadelphia, PA, USA
Duration: 25 Oct 199526 Oct 1995

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume2607
ISSN (Print)0277-786X

Conference

ConferenceField Programmable Gate Arrays (FPGAs) for Fast Board Development and Reconfigurable Computing
CityPhiladelphia, PA, USA
Period25/10/9526/10/95

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