TY - GEN
T1 - HIL Co-Simulation of Proportional Resonant Sliding Mode Control Based FPGA for a Three-Phase Grid-connected VSI System
AU - Mansouri, Houssam Eddine
AU - Talbi, Billel
AU - Mehiris, Moussa Abderrahim
AU - Messaoudene, Idris
AU - Krama, Abdelbasset
N1 - Publisher Copyright:
© 2024 IEEE.
PY - 2024/5/14
Y1 - 2024/5/14
N2 - This work presents an FPGA implementation Based of sliding-mode control (SMC) and a proportional-resonant (PR) scheme for grid-connected three-phase voltage source inverter (VSI) based LCL-filter. The proposed strategy necessitates generating three-phase reference voltage of the filtering capacitors. However, their calculation involves a derivative operation, which is commonly avoided in control algorithms due to its complexity. To circumvent this issue, the generation of the capacitor voltage is accomplished through the application of a PR controller, eliminating the need for derivatives while achieving accurate tracking reference currents. The digital implementation of the PR based SMC controller is detailed and evaluated through MATLAB/Simulink and Xilinx system generator (XSG) integrated platform. The hardware-in-the-loop (HIL) co-simulation via Digilent BASYS 3 evaluation and development FPGA kit aids in controller performance evaluation.
AB - This work presents an FPGA implementation Based of sliding-mode control (SMC) and a proportional-resonant (PR) scheme for grid-connected three-phase voltage source inverter (VSI) based LCL-filter. The proposed strategy necessitates generating three-phase reference voltage of the filtering capacitors. However, their calculation involves a derivative operation, which is commonly avoided in control algorithms due to its complexity. To circumvent this issue, the generation of the capacitor voltage is accomplished through the application of a PR controller, eliminating the need for derivatives while achieving accurate tracking reference currents. The digital implementation of the PR based SMC controller is detailed and evaluated through MATLAB/Simulink and Xilinx system generator (XSG) integrated platform. The hardware-in-the-loop (HIL) co-simulation via Digilent BASYS 3 evaluation and development FPGA kit aids in controller performance evaluation.
KW - Field programmable gate array hardware in the loop co-simulation
KW - Grid-connected inverter
KW - Sliding mode control
KW - Voltage source inverter
KW - Xilinx system generator
UR - http://www.scopus.com/inward/record.url?scp=85198948590&partnerID=8YFLogxK
U2 - 10.1109/ICEEAC61226.2024.10576404
DO - 10.1109/ICEEAC61226.2024.10576404
M3 - Conference contribution
AN - SCOPUS:85198948590
T3 - 2024 2nd International Conference on Electrical Engineering and Automatic Control, ICEEAC 2024
BT - 2024 2nd International Conference on Electrical Engineering and Automatic Control, ICEEAC 2024
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2nd International Conference on Electrical Engineering and Automatic Control, ICEEAC 2024
Y2 - 12 May 2024 through 14 May 2024
ER -