TY - GEN
T1 - HW/SW co-design based implementation of Gas discrimination
AU - Ait Si Ali, Amine
AU - Amira, Abbes
AU - Bensaali, Faycal
AU - Benammar, Mohieddine
AU - Bermak, Amine
N1 - Publisher Copyright:
© 2016 IEEE.
PY - 2016/11/28
Y1 - 2016/11/28
N2 - A gas discrimination system is mainly made of two parts, the sensing part and the processing part. As an alternative solution to pure software or hardware implementation of the processing part of a gas identification system, this paper proposes a gas discrimination system and its implementation on the Zynq system on chip platform using hardware/software co-design approach. In addition, the recommended system uses principal component analysis for dimensionality reduction, binary decision tree for classification and a 4×4 in-house gas sensor array for sensing. Moreover, k-nearest neighbors classifier is also used and compared with decision tree. MATLAB is used for simulation and validation before the final implementation on the Zynq. Algorithms are implemented using high level synthesis and different optimization directives are applied. Hardware implementation results on the Zynq show that real-time performances can be achieved for proposed e-nose system using hardware/software co-design approach with a single ARM processor running at 667 MHz and the programmable logic running at 142 MHz.
AB - A gas discrimination system is mainly made of two parts, the sensing part and the processing part. As an alternative solution to pure software or hardware implementation of the processing part of a gas identification system, this paper proposes a gas discrimination system and its implementation on the Zynq system on chip platform using hardware/software co-design approach. In addition, the recommended system uses principal component analysis for dimensionality reduction, binary decision tree for classification and a 4×4 in-house gas sensor array for sensing. Moreover, k-nearest neighbors classifier is also used and compared with decision tree. MATLAB is used for simulation and validation before the final implementation on the Zynq. Algorithms are implemented using high level synthesis and different optimization directives are applied. Hardware implementation results on the Zynq show that real-time performances can be achieved for proposed e-nose system using hardware/software co-design approach with a single ARM processor running at 667 MHz and the programmable logic running at 142 MHz.
KW - Zynq
KW - decision tree
KW - electronic nose
KW - high level synthesis
KW - k-nearest neighbors
KW - principal component analysis
UR - http://www.scopus.com/inward/record.url?scp=85006919173&partnerID=8YFLogxK
U2 - 10.1109/ASAP.2016.7760806
DO - 10.1109/ASAP.2016.7760806
M3 - Conference contribution
AN - SCOPUS:85006919173
T3 - Proceedings of the International Conference on Application-Specific Systems, Architectures and Processors
SP - 237
EP - 238
BT - 2016 IEEE 27th International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 27th IEEE International Conference on Application-Specific Systems, Architectures and Processors, ASAP 2016
Y2 - 6 July 2016 through 8 July 2016
ER -