TY - GEN
T1 - Novel VLSI implementation of Peano-Hilbert curve address generator
AU - Wang, Yan
AU - Chen, Shoushun
AU - Bermak, Amine
PY - 2008
Y1 - 2008
N2 - This paper presents a fast algorithm for generating Hilbert address for hardware implementation with low storage requirement. This work avoids the use of recursive functions as compared with Quinqueton's work, and eliminates complicated bit manipulations as proposed by Butz, and does not use any look-up-tables as implemented by Kamata. Each address can be obtained in one clock cycle by one-to-one mapping using a simple incremental counter and cascading of multiplexers. The merit of our method is that it achieves very high speed when computing the Hilbert address which requires little memory storage.
AB - This paper presents a fast algorithm for generating Hilbert address for hardware implementation with low storage requirement. This work avoids the use of recursive functions as compared with Quinqueton's work, and eliminates complicated bit manipulations as proposed by Butz, and does not use any look-up-tables as implemented by Kamata. Each address can be obtained in one clock cycle by one-to-one mapping using a simple incremental counter and cascading of multiplexers. The merit of our method is that it achieves very high speed when computing the Hilbert address which requires little memory storage.
UR - http://www.scopus.com/inward/record.url?scp=51749099177&partnerID=8YFLogxK
U2 - 10.1109/ISCAS.2008.4541458
DO - 10.1109/ISCAS.2008.4541458
M3 - Conference contribution
AN - SCOPUS:51749099177
SN - 9781424416844
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
SP - 476
EP - 479
BT - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
T2 - 2008 IEEE International Symposium on Circuits and Systems, ISCAS 2008
Y2 - 18 May 2008 through 21 May 2008
ER -