Orthogonal access architectures and reduced meshes for parallel image computations

Hussein M. Alnuweiri*, V. K.Prasanna Kumar

*Corresponding author for this work

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

Abstract

A class of orthogonal-access parallel organizations is studied for applications in image and vision analysis. These architectures consist of a massive memory and a reduced number of processors which access the shared memory. The memory can be envisaged as an array of memory modules in the k-dimensional space, with each row of modules along a certain dimension connected to one bus. Each processor has access to one bus along each dimension. It is shown that these organizations are communication-efficient and can provide processor-time optimal solutions to a wide class of image and vision problems. In the two-dimensional case, the basic organization has n processors and an n × n memory array which can hold an n × n image, and it provides O(n) time solution to several image computations including: histograming, histogram equalization, computing connected components, convexity problems, and computing distances. Such problems also take O(n) time on a two-dimensional mesh with n2 processors. For the general k-dimensional case, a class of orthogonal data movement operations can be implemented on such organizations to yield processor-time optimal image and vision algorithms.

Original languageEnglish
Title of host publicationProceedings of SPIE - The International Society for Optical Engineering
EditorsJoydeep Ghosh, G.Colin Harrison
PublisherPubl by Int Soc for Optical Engineering
Pages212-223
Number of pages12
ISBN (Print)0819402931
Publication statusPublished - 1990
Externally publishedYes
EventParallel Architectures for Image Processing - Santa Clara, CA, USA
Duration: 14 Feb 199015 Feb 1990

Publication series

NameProceedings of SPIE - The International Society for Optical Engineering
Volume1246
ISSN (Print)0277-786X

Conference

ConferenceParallel Architectures for Image Processing
CitySanta Clara, CA, USA
Period14/02/9015/02/90

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