Parallel Constant-Time Connectivity Algorithms on a Reconfigurable Network of Processors

This short note presents constant-time algorithms for label- ing the connected components of an image on a network of processors with a wide reconfigurable bus. The algorithms are based on a processor indexing scheme which employs constant-weight codes. The use of such codes enables identifying a single representative processor for each component in a constant number of steps. The proposed algorithms can label an N x N image in 0(1) time using N2processors, which is optimal. Furthermore, the proposed techniques lead to an O(log N/log log N)-time image labeling algorithm on a network of N2 processors with a reconfigurable bus of width log N bits. It is shown that these techniques can be applied to labeling an undirected N-vertex graph represented by an adjacency matrix.