Performance evaluation of ATM switches under various traffic and buffering schemes

Mounir Hamdi*, Jogesh Muppala

*Corresponding author for this work

Research output: Contribution to conferencePaperpeer-review

Abstract

B-ISDN networks are designed to offer a variety of services with bit rates ranging from several kb/s to hundreds of Mb/s, and in some cases approaching Gb/s. A multiplicity of rates and the burstiness of traffic sources lead naturally to systems based on the fast packet switching (or Asynchronous Transfer Mode) concept. The requirement of data buffering and high-speed processing of packet headers have resulted in a plethora of proposals for ATM switching nodes. In particular, the class of nonblocking ATM switches has received the most attention. This paper reviews this class with emphasis on contention resolution methods and communication traffic performance.

Original languageEnglish
Pages828-832
Number of pages5
Publication statusPublished - 1995
Externally publishedYes
EventProceedings of the 1995 IEEE Global Telecommunications Conference. Part 2 (of 3) - Singapore, Singapore
Duration: 14 Nov 199516 Nov 1995

Conference

ConferenceProceedings of the 1995 IEEE Global Telecommunications Conference. Part 2 (of 3)
CitySingapore, Singapore
Period14/11/9516/11/95

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