Power optimization in multipliers using multi-precision combined with voltage scaling techniques

Keyphrases

• Voltage Scaling 100%
• Generating Algorithm 50%
• Low Power multiplier 50%
• Standard Cell Library 50%
• Synopsys 50%
• Dynamic Power Dissipation 50%
• Digital Signal Processor 50%
• Design for Environment 50%
• Partial Product 50%
• Delay Reduction 50%
• Supply Voltage Frequency 50%
• Unused Resources 50%
• Multi-precision multiplication 50%
• Modified Booth Encoding 50%

Engineering

• Powered Device 50%
• Design Environment 50%
• Reduce Power Consumption 50%
• Clock Frequency 50%
• Digital Signal Processor 50%
• Dynamic Power Dissipation 50%

Computer Science

• Unused Resource 50%
• Dynamic Power Dissipation 50%
• Reduce Power Consumption 50%
• Partial Product 50%
• Low-Power Design 50%
• Digital Signal Processor 50%