Programmable multi-task on-chip processing for CMOS imagers

F. Boussaid, A. Bermak, A. Bouzerdoum

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

Programmable multi-task on-chip processing is proposed for improving the performance of CMOS imagers in terms of sensitivity adaptation and image processing capabilities. The current-mode fully analog on-chip processing only performs computations during the readout and analog-to-digital conversion phases, removing the need for any in-pixel or focal-plane processing circuitry. A VLSI implementation, in AMI 0.5μm CMOS process, results in significant silicon area savings as processing circuitry accounts for less than 20% of the imager prototype core area. Only three externally tunable parameters are required to fully define the processing task to be carried out by the 32x32 CMOS imager prototype, which performs sensitivity adaptation, edge detection or image enhancement on read-out.

Original languageEnglish
Title of host publicationProceedings - International Conference on MEMS, NANO and Smart Systems, ICMENS 2003
EditorsWalied Moussa, Wael Badawy
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages227-232
Number of pages6
ISBN (Electronic)0769519474, 9780769519470
DOIs
Publication statusPublished - 2003
Externally publishedYes
EventInternational Conference on MEMS, NANO and Smart Systems, ICMENS 2003 - Banff, Canada
Duration: 20 Jul 200323 Jul 2003

Publication series

NameProceedings - International Conference on MEMS, NANO and Smart Systems, ICMENS 2003

Conference

ConferenceInternational Conference on MEMS, NANO and Smart Systems, ICMENS 2003
Country/TerritoryCanada
CityBanff
Period20/07/0323/07/03

Keywords

  • Ambient intelligence
  • Analog computers
  • Analog-digital conversion
  • CMOS image sensors
  • CMOS process
  • Circuits
  • Image processing
  • Prototypes
  • Silicon
  • Very large scale integration

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