Self-Checking Hardware Design for Montgomery Exponentiation-Based Cryptography

Muhammad Ali Akbar*, Abdullatif Shikfa, Bo Wang, Amine Bermak

*Corresponding author for this work

Research output: Contribution to journalArticlepeer-review

Abstract

Montgomery exponentiation is widely used for public-key-based cryptography systems. The current state-of-the-art designs for this algorithm are well-analyzed in terms of hardware overhead but are not investigated for faults caused by physical attacks. This paper presents a self-checking hardware design for the Montgomery Multiplier (MM), which can counter multiple faults simultaneously. The proposed 64-bit self-checking MM approach with a distributed fault prognosis mechanism requires only 43.5% area and 10.9% power overhead as compared to the non-self-checking design. Moreover, a novel self-checking parity prediction approach is proposed for carry save adder, which can be used in cases where it is used alone inside a loop.

Original languageEnglish
Pages (from-to)119915-119926
Number of pages12
JournalIEEE Access
Volume12
DOIs
Publication statusPublished - 22 Aug 2024

Keywords

  • Fault localization
  • Montgomery exponentiation
  • Parity prediction
  • Self-checking adder

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