TY - JOUR
T1 - Simplified hybrid space vector modulation for multilevel diode clamped converter
AU - Bouzidi, Mansour
AU - Barkat, Said
AU - Krama, Abdelbasset
N1 - Publisher Copyright:
© The Institution of Engineering and Technology 2020.
PY - 2020/12/21
Y1 - 2020/12/21
N2 - This study proposes a new simplified hybrid space vector modulation (HSVM) algorithm for multilevel diode clamped converter (DCC). The main idea consists in combining the advantages of both space vector modulation (SVM) algorithms synthesised in abc and αβ coordinates to establish a new hybrid, simplified and generalised SVM algorithm. The HSVM algorithm offers a simple method to compute the duration time, automatic generation of all redundant states of the adjacent switching vectors without triangles identification stage and switching sequence definition for any DCC level. Moreover, all the computational processes are performed in one unique sector thanks to the proposed new reference voltage vector defined in abc-coordinates. The proposed algorithm does not require any coordinates transformation or lookup tables. Also, it can be implemented with minimum computational burden using a low resources digital platform. The proposed HSVM is verified through MATLAB simulation and validated experimentally using three-level DCC laboratory prototype. For high-level DDC, the HSVM is tested in real time using hardware-in-the loop testing technology. Different case studies are performed to demonstrate the high performance of the proposed HSVM and its ability in lowering the computational resources requirement.
AB - This study proposes a new simplified hybrid space vector modulation (HSVM) algorithm for multilevel diode clamped converter (DCC). The main idea consists in combining the advantages of both space vector modulation (SVM) algorithms synthesised in abc and αβ coordinates to establish a new hybrid, simplified and generalised SVM algorithm. The HSVM algorithm offers a simple method to compute the duration time, automatic generation of all redundant states of the adjacent switching vectors without triangles identification stage and switching sequence definition for any DCC level. Moreover, all the computational processes are performed in one unique sector thanks to the proposed new reference voltage vector defined in abc-coordinates. The proposed algorithm does not require any coordinates transformation or lookup tables. Also, it can be implemented with minimum computational burden using a low resources digital platform. The proposed HSVM is verified through MATLAB simulation and validated experimentally using three-level DCC laboratory prototype. For high-level DDC, the HSVM is tested in real time using hardware-in-the loop testing technology. Different case studies are performed to demonstrate the high performance of the proposed HSVM and its ability in lowering the computational resources requirement.
UR - http://www.scopus.com/inward/record.url?scp=85101348293&partnerID=8YFLogxK
U2 - 10.1049/iet-pel.2020.0529
DO - 10.1049/iet-pel.2020.0529
M3 - Article
AN - SCOPUS:85101348293
SN - 1755-4535
VL - 13
SP - 3861
EP - 3870
JO - IET Power Electronics
JF - IET Power Electronics
IS - 17
ER -