TY - JOUR
T1 - Sliding-Mode Control Strategy for Three-Phase Three-Level T-Type Rectifiers with DC Capacitor Voltage Balancing
AU - Bayhan, Sertac
AU - Komurcugil, Hasan
N1 - Publisher Copyright:
© 2013 IEEE.
PY - 2020
Y1 - 2020
N2 - A sliding mode control (SMC) strategy with dc capacitor voltage balancing is proposed for three-phase three-level T-type rectifiers. The proposed SMC strategy is designed in the abc frame rather than the dq frame. In this case, the necessity of three-phase current transformations is eliminated. The proposed SMC is based on the errors of the line currents. The amplitude of line current references is generated by controlling the dc voltage using a proportional-integral (PI) controller. In order to obtain unity power factor, the generated reference amplitude is multiplied by the corresponding sinusoidal waveform obtained from the phase locked loop (PLL) operating with grid voltages. The dc capacitor voltage balancing is achieved by adding a proportional control term into the line current reference obtained for each rectifier leg. The performance of the proposed control strategy is validated by simulations and experiments during steady-state, transients caused by load change, and unbalanced grid conditions. The results show that the proposed control strategy offers excellent steady-state and dynamic performances with low THD in the line currents, zero steady-state error in the output voltage, and very fast dynamic response.
AB - A sliding mode control (SMC) strategy with dc capacitor voltage balancing is proposed for three-phase three-level T-type rectifiers. The proposed SMC strategy is designed in the abc frame rather than the dq frame. In this case, the necessity of three-phase current transformations is eliminated. The proposed SMC is based on the errors of the line currents. The amplitude of line current references is generated by controlling the dc voltage using a proportional-integral (PI) controller. In order to obtain unity power factor, the generated reference amplitude is multiplied by the corresponding sinusoidal waveform obtained from the phase locked loop (PLL) operating with grid voltages. The dc capacitor voltage balancing is achieved by adding a proportional control term into the line current reference obtained for each rectifier leg. The performance of the proposed control strategy is validated by simulations and experiments during steady-state, transients caused by load change, and unbalanced grid conditions. The results show that the proposed control strategy offers excellent steady-state and dynamic performances with low THD in the line currents, zero steady-state error in the output voltage, and very fast dynamic response.
KW - Three-level T-type rectifier
KW - proportional-integral control (PI)
KW - sliding mode control
UR - http://www.scopus.com/inward/record.url?scp=85083740013&partnerID=8YFLogxK
U2 - 10.1109/ACCESS.2020.2980814
DO - 10.1109/ACCESS.2020.2980814
M3 - Article
AN - SCOPUS:85083740013
SN - 2169-3536
VL - 8
SP - 64555
EP - 64564
JO - IEEE Access
JF - IEEE Access
M1 - 9036928
ER -